发明名称 DIFFERENTIAL LOGIC CIRCUIT FOR ASYNCHRONOUS SYSTEM
摘要 PURPOSE: To make a circuit simple and inexpensive by controlling the existence period of a differentiated output signal corresponding to a feedback signal only from a circuit to utilize that signal. CONSTITUTION: Of a deriver (DERIVER) ▵X, only a change (0→1) in a variable X generates an equivalent change (0→1) in a variable Y. Then, the activity change of a feedback signal F is utilized for returning the output signal Y to a standstill state, (1→0). In this case, the differentiated signal Y as the output of an AND gate 21 can be expressed as Y=XΛPΛ(FΛ', SΛ', Y) in respect to the input X. Then, the internal state of the deriver is stored by RSFF 23 and 24 and RSFF 29 and 31. Therefore, since the state is changed after the fixture of a level regardlessly of the transient state of the signal, operation can be made sure.
申请公布号 JPS6453621(A) 申请公布日期 1989.03.01
申请号 JP19880057345 申请日期 1988.03.10
申请人 MONTEDISON SPA 发明人 ANJIERO BERUTORAMINI
分类号 H03K19/003;H03K3/02;H03K5/00;H03K5/1532;H03K5/1534;H03K19/20;H03K19/21 主分类号 H03K19/003
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