发明名称 |
DEMODULATING CLOCK GENERATING CIRCUIT FOR DIGITAL AUDIO INTERFACE DEMODULATING CIRCUIT |
摘要 |
PURPOSE:To omit a time constant circuit, to stabilize operation and to form an integrated circuit by detecting the pulse width of a DAI signal from the counted result of reference clock signals based up a counter to detect a preamble synchronizing signal. CONSTITUTION:A 2-bit shift register 23 for inputting a reference clock inputted from a terminal 21 as a shift clock and inputting a DAI signal inputted from a terminal 22 as a serial input constitute an inversion detecting means together with a exclusive OR gate 24. A 6-bit counter to be the 1st counting means, a D-type flip flop (FF) to which the output of the gate 24 and VDD are impressed and an FF 27 for inputting the output of a 4-bit counter 28 to be the 2nd counting means constitute a D latch circuit and the output of the D latch circuit is inputted to a phase comparator 29 through an inverter 30. The comparator 29 uses the output of a frequency divider 34 as a variable input and outputs a demodulator clock from a terminal 35 through an LPF 31, a VCO 32 and a frequency divider 33. |
申请公布号 |
JPS6449177(A) |
申请公布日期 |
1989.02.23 |
申请号 |
JP19870205023 |
申请日期 |
1987.08.20 |
申请人 |
PIONEER ELECTRON CORP;HITACHI LTD |
发明人 |
MIYAKE ICHIRO;OKAMOTO HIROO |
分类号 |
H03L7/06;G11B20/14;H04L7/033 |
主分类号 |
H03L7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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