发明名称 |
CHECKING DEVICE FOR DOUBLE APPLICATION OF OUTPUT INSTRUCTION |
摘要 |
<p>PURPOSE:To shorten the checking time for double application of an output instruction by using an output instruction detecting circuit and an output instruction selecting circuit which decides whether or not an output instruction is coincident with the selecting conditions shown by a selecting condition table. CONSTITUTION:An output instruction detecting circuit 3 detects that the program instruction outputted from a program memory 2 is equal to an output instruction and delivers a signal showing the presence of the output instruction to a signal line (c). An output instruction selecting circuit 4 receives said signal via the line (c) and checks whether this signal is coincident or not with the selecting conditions shown by a selecting condition table 5. Then an output instruction coincident with the selecting conditions is outputted to a bus (g). In such a case, the table 5 delivers a number pointed by a table pointer 5' to the circuit 4 as the selecting conditions. The circuit 4 selects an input instruction that secures the coincidence between said received number and the lowest level number of the pointed address of the output instruction. In such a way, the reading frequency of the output instruction is decreased and the checking time is shortened for double application of the output instruction.</p> |
申请公布号 |
JPS6446104(A) |
申请公布日期 |
1989.02.20 |
申请号 |
JP19870203008 |
申请日期 |
1987.08.17 |
申请人 |
FUJI ELECTRIC CO LTD |
发明人 |
MATSUMOTO SUSUMU;SAITO SUSUMU;TSUNODA TETSUO |
分类号 |
G06F11/28;G05B19/04;G05B19/048;G05B19/05;G05B23/02 |
主分类号 |
G06F11/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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