| 摘要 |
PURPOSE:To decrease the kinds of an input signal to a logical set section and to improve the operating speed, by obtaining a desired logical output in an output node depending on whether plural logical arithmetic input signals satisfy a desired logical establishing condition. CONSTITUTION:When the input signals A, B are both ''1'' or ''0'', the logical set section 20 is made conductive, nodes Z, X go to ground potnetial when a control signal -phi goes to 1, and an M1 is conductive. Thus, a node W goes to ground potential and an output signal F goes to ''1''. When the input signal A is at ''0'' and the B is at ''1'', an N1 is ponductive, an N2 is cut off, a P2 is conductive, and although the same voltage as that at the node X appears at the node Y, the P1 is cut off by selecting suitably the threshold voltage of the P1. Thus, the logical set section 20 is nonconductive and a voltage at the node W is kept to the VDD. When the A is at ''1'' and the B is at ''0'', the voltage at the node W is kept to the VDD according to the said operation. Thus, the logical equation F=AB+(-A)(-B) is obtained at an output signal F. |
