发明名称 OFFSET CURRENT HOLDING CIRCUIT
摘要 <p>PURPOSE:To detect and hold an offset current when signal processing is performed in current mode by holding an interbase emitter voltage corresponding to the peak value of a current and the voltage drop across a resistance in a capacitor, and providing a transistor (Tr) which is controlled with its capacitor voltage. CONSTITUTION:Transistors (Tr) Q1 and Q2, and Q6 and Q7 constitute current mirrors and mutually equal currents flow. Then a current flowing to the Tr Q1 is controlled by a phototransistor (Pt) Q0 and a current flowing to the Tr Q3 is controlled by a 1st constant current circuit 1 and the Tr Q2. The same current as the current IP of the Pt Q0 flows to the Tr Q2, so a current I0-IP flows to the Tr Q3 and a voltage corresponding to the peak current value of the Tr Q3 is therefore charged and held in the capacitor C. Then a current I5 flowing to the Tr Q5 becomes equal to the peak current I0-IP, a current I6 flowing to the Tr Q6 is an offset current I0-I5, and this current is outputted from a Tr Q7 constituting a current mirror to the Tr Q6.</p>
申请公布号 JPS6432128(A) 申请公布日期 1989.02.02
申请号 JP19870187669 申请日期 1987.07.29
申请人 NEW JAPAN RADIO CO LTD 发明人 HIRAGA KIMIHISA;CHIBA MASAHIKO
分类号 G01D5/26;G01J1/44;G01R19/00;H03K17/78 主分类号 G01D5/26
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