| 摘要 |
<p>PURPOSE:To perform high-speed burst-like data switching without using a processor by adding a switch control bit to the head field of data, and controlling a multistage switch by using this control bit. CONSTITUTION:The data, to which the switch control bit is added at its head field, is stored in BUF1, BUF2 through header processing circuits IH1, IH2. In a switch control circuit SWC, block transfer data, outputted by the IH1, IH2, is given to a digital space division switch SDSW according to the detection output of the IH1, IH2, and the switch state signal of the switch element SE of a rear stage. The SDSW selects successively a destination channel by using the control bit. In this case, when the SDSW is busy, the transfer data is stored in the BUF1, BUF2 once, and after waiting an idle state, is given to the SDSW.</p> |
