| 摘要 |
PURPOSE:To efficiently obtain a test data of the whole circuit by executing logic and fault simulations at every unit circuit, or using a result of the past, in a large scale logic integrated circuit. CONSTITUTION:By executing logic and fault simulation of plural unit circuits for constituting the whole integrated circuit, or using a result of simulation executed in the past, input/output data of each unit circuit are supplemented to each other, and recorded. From this recorded file, input/output patterns of each unit circuit are retrieved, and input/output values between each block of the input/output data are checked, by which a test data of the whole integrated circuit is completed. In such a way, the test data of a large scale logic integrated circuit is prepared, and also, the simulation of the unit circuit whose simulation is executed already is omitted, and the test data is prepared in a short time. |
