发明名称 SINGLE CHIP MICROCOMPUTER
摘要 PURPOSE:To realize a securer fail-safe by adding a simple hardware such as a writing permitting flag, a reading permitting flag, an address decoder to a secret zone in a PROM memory and a timer for detecting a runaway to a P(Programmable)ROM block. CONSTITUTION:The microcomputer has an address decoder, a writing permitting flag 154, a reading permitting flag 153, a timer 152 for detecting a runaway, a gate circuit to output a read strobe signal to a PROM only when a reading permitting flag 153 goes to a reading permission, a gate circuit to output a write strobe signal 1519 to a PROM 11 only when a writing permitting flag goes to a writing permission, and a gate circuit to output an access error signal 1516 and execute the interruption processing request to a CPU when a zone selecting signal 1510 is outputted and both a read strobe signal 1520 and a write strobe signal 1519 are not outputted, and executes the access processing to a secret zone. Thus, the unjust data access to occur by a software processing is prohibited and a security is increased.
申请公布号 JPS6413652(A) 申请公布日期 1989.01.18
申请号 JP19870170051 申请日期 1987.07.07
申请人 NEC CORP 发明人 OKAMOTO WATARU
分类号 G06F11/30;G06F11/00;G06F12/14;G06F15/78;G06F21/02 主分类号 G06F11/30
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