| 摘要 |
<p>PURPOSE:To correctly verify a program even with a small current flowing in memory cell by using a signal retarding a write signal by a delay circuit to keep the potential of a row line at the same high voltage at the time of writing for a prescribed period after the end of writing. CONSTITUTION:A memory cell array 11 comprising memory cells M00-M33 arranged in matrix shape is provided and each memory cell has a floating gate for storage. Data writing in the memory cell is executed electrically by applying a high voltage to a control gate and drain. After prescribed data is written in the memory cell, a high voltage is applied for a prescribed time successive to the row line connected to the control gate of the memory cell. Thus, even when the current flowing to the memory cell is less, data representing the on-state of the memory cell is outputted from the output of a sense amplifier SA to correctly verify the program.</p> |
