发明名称 PRINTED WIRING BOARD FOR ELECTRONIC CIRCUIT HAVING BURIED BYPASS CAPACITOR
摘要 <p>PURPOSE:To reduce the costs for the parts and packaging work of small- capacity capacitors and to enable a high-density packaging of ICs and memories by providing a layer having the function of a bypass capacitor inside a wiring board. CONSTITUTION:A small-capacity capacitor 9 has an area substantially same as one integrated circuit, and is formed so that one lattice-shaped surface of a power supply layer 3 and a GND layer 4 is the electrode and a ceramic layer 7 is the dielectric. And one electrode of the small-capacity capacitor 9 is connected to a throughhole 11 for the power supply and the other electrode is connected to a throughhole 12 for the GND. Further, the layout of the power supply layer 3 and the GND layer 4 is given so that the electrodes of the small- capacity capacitor 9 is not brought in contact with a throughhole 13 for the signal in the neighborhood of the lattice point to maintain insulation with the throughhole. By burying many small-capacity capacitors 9 in a printed wiring board 1, one for one integrated circuit, in this way, the packaging of the small- capacity capacitors which have been packaged on a parts packaging surface 2 as bypass capacitors become unnecessary.</p>
申请公布号 JPS644096(A) 申请公布日期 1989.01.09
申请号 JP19870159201 申请日期 1987.06.26
申请人 NEC CORP 发明人 KONISHI YASUTOMO
分类号 H05K3/46 主分类号 H05K3/46
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