METHOD FOR ACCELERATION TEST OF SEMICONDUCTOR INTEGRATED CIRCUIT,申请号JP19870159334-传众专利搜索

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发明名称	METHOD FOR ACCELERATION TEST OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要
申请公布号	JPS643576(A)	申请公布日期	1989.01.09
申请号	JP19870159334	申请日期	1987.06.25
申请人	NEC YAMAGUCHI LTD	发明人	OSHITA CHIHIRO
分类号	G01R31/26;G01R31/28;H01L21/66	主分类号	G01R31/26
代理机构		代理人
主权项
地址

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