发明名称 NONVOLATILE RAM
摘要 PURPOSE:To perform a store operation without erasing electrons from a floating gate when the electrons are to be injected into the floating gate before/after the store operation, by coupling an electron tunnel terminal with a first high voltage terminal ERS through which electrons are erased from the floating gate and then connecting the electron tunnel terminal to a transistor. CONSTITUTION:In the case of a store operation in which information of an SRAM is transferred to an EEPROM, a high voltage VE is applied to a first high voltage terminal ERS 15 after a potential on a connection point Q5 is defined to be on an H or L level. When the state of the connection point Q5 is on an L level, a Fowler-Nordheim current flows from a floating gate 14 to an electron tunnel terminal 13, and the electrons are erased from the floating gate 14, so that the floating gate 4 is positively electrified. After electrons can be sufficiently erased from the floating gate 14, a high voltage VCG is applied to a second high voltage terminal CG16. When the state of the connection point Q5 is on an H level, the Fowler-Nordheim current flows from the electron tunnel terminal 13 to the floating gate 14, and the electrons are injected into the floating gate 14, so that the floating gate 14 is negatively electrified.
申请公布号 JPS644062(A) 申请公布日期 1989.01.09
申请号 JP19870158963 申请日期 1987.06.26
申请人 SEIKO INSTR & ELECTRON LTD 发明人 KONISHI HARUO;UEDA CHIHARU
分类号 G11C17/12;G11C14/00;G11C16/04;G11C17/00;H01L21/8247;H01L27/10;H01L27/105;H01L29/78;H01L29/788;H01L29/792 主分类号 G11C17/12
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