Semiconductor memory device having a register.

摘要

A semiconductor memory device having a register and a memory cell array (1) includes a controlling circuit (42) for disconnecting an input/output circuit (7, 11) from a data bus (DB1) and turning OFF a transfer gate (T1) provided between the register and data bus in a first operation mode and for connecting the input/output circuit to the data bus and turning ON the transfer gate in a second operation mode. In the first operation mode, a data read or write operation is performed between the memory cell array and an external circuit, and alternatively in the second operation mode the data read or write operation is performed between the register and the external circuit.