| 摘要 |
PURPOSE:To contrive the augmentation of the charge storage capacitance of the title memory even when the integration of the memory is increased by a method wherein the size of charge storage electrodes is enlarged larger than a size which is limited by the resolution limit dimension of the interval between conductor layer patterns. CONSTITUTION:A DRAM cell is formed by patterning by photolithography, wherein a reactive ion etching treatment method is used, and sidewall-shaped second conductor layers 9, which are each connected ohmically to first conductor layer patterns 7A and 7B and so on, are formed by coating on the end surfaces of the whole peripheries if such poly B layer patterns as the patterns 7A and 7B, each having an almost vertical end surface. Thereby, the external sizes of charge storage electrodes SE-1 and SE-2 and so on are enlarged. By enlarging the size of the charge storage electrodes in such a way, the augmentation of the charge storage capacitance of a DRAM is contrived even when the integration of the DRAM is increased and the reliability of the information of the DRAM is improved. |
