发明名称 BUS CONTROL SYSTEM FOR INFORMATION PROCESSOR
摘要 PURPOSE:To execute a control of a processor by executing an access to a control register from the outside by using a control use data bus even if a general data bus causes a fault, by providing the control use data bus separately from a usual general data bus. CONSTITUTION:A control use data bus 3 is used for writing data to a control register 1 or N from the outside, or sending out data which has been read out of the control register 1 or N, to the outside. Even if some fault is generated in a general data bus 2 and its use becomes impossible, an access is executed to the control register 1 or N from the outside through a control use data bus provided independently. In such a way, the processor 1 can be controlled.
申请公布号 JPS63311459(A) 申请公布日期 1988.12.20
申请号 JP19870147274 申请日期 1987.06.12
申请人 FUJITSU LTD 发明人 TAKEI MASAYOSHI;MURATA TAKESHI;NODA TAKAHITO;KAMISAKA YUJI;ABO KENICHI;NONOMURA KAZUYASU;NISHIMACHI RIYOUICHI;SAKURAI YASUTOMO
分类号 G06F11/00;G06F11/22;G06F13/00 主分类号 G06F11/00
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