| 摘要 |
<p>A method of producing interlayer conductive paths having substantially planar top surfaces in a multilayer integrated circuit structure (IC), comprising the steps of forming elements of either a conductive or semiconductive material (M1) as a lower layer, depositing an insulative layer (I2) on top of the lower layer elements (S), implanting ions into one or more selected regions (V) of the insulative layer, forming at least one upper conductor (M2) over the selected regions and sintering the integrated circuit structure sufficient to render the selected regions conductive. The invention also embraces an integrated circuit structures with interlayer conductive paths (M1 and M2) made in accordance with this method.</p> |
