发明名称 DECODING METHOD
摘要 PURPOSE:To simplify circuit constitution and to facilitate the phase display of a display and the like by re-writing the content of a picture memory while decoding is executed. CONSTITUTION:The picture memory means 11 having addresses corresponding to respective picture elements is set to previously store the reference value of a block to which the corresponding picture element belong, and a differential value LD showing the distribution range of a representative gradation in the block and the K-th digit of a bit plane (the highest-order digit) of a bit plane are collated and the content of the picture memory means 11 is updated. Next, the differential value LD and the(K-1)-th of the bit plane are collated and the content of the picture memory is updated. As for the rest, the content of the picture memory means 11 is similarly updated while the differential values LD are sequentially collated from the high-order digit towards the lower-digit of the bit plane. With phasedly executing decoding, decoding is attained with a simple circuit.
申请公布号 JPS63304768(A) 申请公布日期 1988.12.13
申请号 JP19870140894 申请日期 1987.06.05
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 OCHI HIROSHI;KOBAYASHI MAKOTO;IBARAKI HISASHI
分类号 H04N1/41 主分类号 H04N1/41
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