发明名称 POWER-ON RESETTING CIRCUIT
摘要 <p>PURPOSE:To prevent malfunction by short-circuiting both terminals of a capacitor of a series circuit comprising the capacitor and a resistor provided to obtain a time over a prescribed time by the power of a power storage circuit when the output voltage of a DC power supply becomes lower than a prescribed value. CONSTITUTION:When an output voltage Vcc of a DC power supply is decreased from a normal potential and becomes lower than the sum of the Zener voltage V2 (ZD1) and a base-emitter voltage VBE (Q1), the TR Q1 is turned off, the base current to a TR Q4 is interrupted and the TR Q4 is turned off. In this case, a base current is given to a TR Q5 from a capacitor charged up to the normal voltage of nearly Vcc via a resistor R4, the TR Q5 is turned on to charge up a capacitor C1 rapidly, resulting that a potential VC1 reaches nearly a ground potential. As a result, the TRs Q2, Q3 are turned off and a power-on reset voltage V0 reaches a ground potential. Thus, malfunction is prevented.</p>
申请公布号 JPS63304712(A) 申请公布日期 1988.12.13
申请号 JP19870140819 申请日期 1987.06.04
申请人 NEC CORP 发明人 KIDO SUSUMU
分类号 H03K17/22;G06F1/00;G06F1/24 主分类号 H03K17/22
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