| 摘要 |
PURPOSE:To realize detection of the coincidence to the data on an optional register by securing the logics against two outputs of a report instruction register when a coincidence signal of data between the data and condition registers is delivered from a comparator. CONSTITUTION:A coincidence condition register 1 contains (n) pieces of registers and delivers the data on a register designated by the address data received from a comparison control circuit 2. A comparator 4 compares the data stored in a comparison subject register 3 with the data set at the register 1, then outputs a logic '1' or '0' when the coincidence is obtained and not, respectively. The circuit 2 contains the report instruction register 21 consisting of (n) pieces of registers. An inverter 5 inverts the output of the register 21 and an AND gate 6 outputs an address replacement signal R of a logic '1' to an address register 23 of the circuit 2 when the outputs of the inverter 5 and the comparator 4 are equal to logic '1'. While an AND gate 7 outputs a coincidence report signals D when the outputs of the register 21 and the comparator 4 are equal to logic '1'.
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