| 摘要 |
PURPOSE:To realize high precision lateral epitaxial growth on an interlayer insulating layer by burying a semiconductor layer to pick up the crystal axis of semiconductor element layer of the lower layer to an aperture of each interlayer insulating layer which reaches the lower semiconductor element layer provided to the position different from an aperture at the interlayer insulating layer of the lower layer. CONSTITUTION:After forming a flat first interlayer insulation film 22, a first epitaxy silicon layer 6 and a first single crystal silicon layer 71 on a MOS transistor TRA of a first layer, it is then patterned to form a single crystal silicon layer 76 and a single crystal silicon layer 74. In this case, the layer 76 is formed to the position far from the first epitaxy silicon layer 6. A MOSTRB of a second layer is formed on the layer 74. A second interlayer oxide film 24 is deposited on the TRB, it is then flattened, a second opening 51 is formed on the layer 76 of interlayer oxide film 24, and a second epitaxy silicon layer 61 is grown. Moreover, a second single crystall silicon layer 75 is formed thereon. Finally, the layer 75 is patterned and TRC of the third layer is formed, thus obtaining a three-dimensional circuit element of three-layered structure.
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