发明名称 Carry-look-ahead adder including bipolar and MOS transistors
摘要 A carry-look-ahead adder is provided which is implemented as a semiconductor integrated circuit. The integrated circuit includes a bipolar transistor coupled to the output terminal for providing an output indicative of the arithmetic operation. Impedance elements are coupled to the bipolar transistor and at least one FET is provided to control the on/off state of the bipolar transistor.
申请公布号 US4789958(A) 申请公布日期 1988.12.06
申请号 US19850703171 申请日期 1985.02.19
申请人 HITACHI, LTD. 发明人 MAEJIMA, HIDEO;HOTTA, TAKASHI;MASUDA, IKURO;IWAMURA, MASAHIRO;KURITA, KOUZABUROU;UENO, MASAHIRO
分类号 G06F5/01;G06F7/50;G06F7/508;G06F13/40;G06F15/78;(IPC1-7):G06F7/50 主分类号 G06F5/01
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