| 摘要 |
<p>PURPOSE:To speed up arithmetic processing by inputting a clock signal synchronizing in phase with a data signal and a phase delay clock signal delayed in phase to an integrated circuit and forming a processing clock signal for the arithmetic processing of a high frequency and synchronizing in phase with the clock signal. CONSTITUTION:The clock signal A and the phase delay clock signal B delayed in phase in the phase delay circuit 3 are synthesized in a clock signal generating circuit 1 for generating the clock signal A having the same frequency as that by which the data signal 2 is sampled and the phase delay circuit 3 for delaying the phase of the clock signal A generated in the clock signal generating circuit 1 to generate the processing clock signal having the frequency plural times as long as the clock signal and execute the arithmetic processing by this processing clock signal C. Accordingly, a delay in a line length or a rounding in a waveform on a wiring, a fluctuation in the operating temperature or a source voltage, the turbulence in the waveform due to the unevenness in an element or the turbulence of the data signal and the phase can be prevented. Thereby, the arithmetic processing can be executed at high speed.</p> |
