发明名称 IC TEST SYSTEM
摘要 PURPOSE:To achieve a higher testing speed, by a method wherein the execution by lines of a test program is controlled with a higher-order processor, actual execution of the program is done with lower-order processors and the results of testing are outputted with signal lines one per element to be tested. CONSTITUTION:A plurality of lower-order processors 23A-23N are connected to a higher-order processor 21. The processor 21 decides whether a program line read is executed or not checking a state of testing an element to be tested and assigns actual execution of the program line decided to be executed to any of the processors 23A-23N provided at a lower order. The processors 23A-23N judge the propriety of a test data obtained for the element being tested and the results of judgement are supplied to the processor 21 separately through signal lines 27A-27N one per element being tested.
申请公布号 JPS63298178(A) 申请公布日期 1988.12.05
申请号 JP19870133815 申请日期 1987.05.29
申请人 ADVANTEST CORP 发明人 UEDA MOTOO;HASEGAWA SHINPEI;SHIMIZU TOSHIYUKI
分类号 G01R31/28;H01L21/66 主分类号 G01R31/28
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