发明名称 LOGIC ANALYZER
摘要 PURPOSE:To facilitate identification with a simple operation, by displaying all waveforms of signals at a specified channel group having similar functions being overlapped on one line. CONSTITUTION:A sampling circuit 105 samples and digitizes an input signal 50 at a fixed cyclic interval prescribed by a sample clock 110. A trigger circuit 100 prescribes trigger conditions to be satisfied by the input signal 50 before the start of a sampling. Then, when the input signal 50 satisfies trigger conditions, the circuit 100 sends a signal to a memory control circuit 130 to store a sampled value generated with the circuit 105 into a trace memory 135. Sampling information stored in the memory 135 is processed with a microprocessor 150 and a display waveform is indicated 15 through a display memory 160. In this manner, a plurality of digital signals are displayed at the same logically high or low level, while the transition of the digital signals is displayed being overlapped between the same levels.
申请公布号 JPS63295970(A) 申请公布日期 1988.12.02
申请号 JP19880107506 申请日期 1988.04.28
申请人 YOKOGAWA HEWLETT PACKARD LTD 发明人 KEBIN EMU BUTSUSHIYU
分类号 G01R13/28;G01R13/34;G01R13/40;G01R31/3177;G06F11/25 主分类号 G01R13/28
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