| 摘要 |
PURPOSE:To miniaturize circuit size by holding input data in a static type data latching means in the prestage, holding the data through the input capacity of a pair of static type data latching means and then holding the data in a static type data latching means in the post stage to successively shift the data. CONSTITUTION:One bit is constituted of a pair of adjacent static type data latch circuit SDLAT1, 2 and data are successively shifted by adopting a 1st control state for holding input data in the prestage static type data latch circuit SDLAT1, a 2nd control state for holding the data held in the prestage through the input capacity of a pair of static type data latch circuits SDLAT1, 2 and a 3rd control state for holding the data held through the capacity in the post stage static type data latch circuits SDLAT2. Consequently, the circuit can be miniaturized without using D-type, T-type or RS-type flip flops. |
