发明名称 PULSE CUT-OFF DETECTION CIRCUIT
摘要 PURPOSE:To accurately detect the cut-off of a pulse, by stopping a count operation by a pulse signal cut-off detecting signal by opening a counter reset by an input pulse signal and performs the count operation when the input pulse signal is cut-off. CONSTITUTION:A count value is set on the counter 1 by a time TB which recognizes the cut-off of the pulse and a clock cycle (t). And when the pulse of '1' level is inputted within the time TB from a data input (b), the counter is reset. And when the data input (b) goes to '0' level, the reset state of the counter 1 is released, and a clock is inputted from a clock input (a) to the terminal C of the counter 1 via a NOR circuit 2. Thereby, the counter 1 starts the count of a pulse cut-off time. And when the count value arrives at a preset value, the output of the counter 1 goes to the '1' level, and a pulse cut-off detecting output (c) goes to the '1' level.
申请公布号 JPS63292821(A) 申请公布日期 1988.11.30
申请号 JP19870127062 申请日期 1987.05.26
申请人 NEC CORP;NEC MIYAGI LTD 发明人 UCHIUMI KIYOJI;USAMI MASAHIKO
分类号 H03K5/19;G06F1/04;H04L25/02 主分类号 H03K5/19
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