发明名称 |
Power-On-Reset (POR) circuit |
摘要 |
A Power-On-Reset (POR) Circuit compares a logic supply voltage to a reference voltage and provides a logic voltage validity signal if the logic voltage is greater than the reference voltage; the circuit delays, on startup, the validity signal for a selected period and then provides a drive signal for driving a solid-state switch which provides an open circuit on the presence of the drive signal, indicating logic voltage validity, and a short circuit in its absence, indicating invalidity; and the circuit immediately disables the drive signal if the logic voltage falls below the reference voltage. The selected start-up delay period is independent of the supply voltage magnitude.
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申请公布号 |
US4788462(A) |
申请公布日期 |
1988.11.29 |
申请号 |
US19870013757 |
申请日期 |
1987.02.12 |
申请人 |
UNITED TECHNOLOGIES CORPORATION |
发明人 |
VESCE, RICHARD V.;REPP, JR., JOHN D. |
分类号 |
H03K17/22;(IPC1-7):H03K5/153 |
主分类号 |
H03K17/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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