发明名称 READ OUT CIRCUIT
摘要 <p>PURPOSE:To realize stable read out operation by providing a write/erase circuit which can set the on-state current of a dummy-memory transistor (TR) with the aid of this memory TR so as to easily make the on-state current, that means, reference voltage proper after the circuit is produced. CONSTITUTION:A reference voltage generation circuit 2 consisting of a dummy memory element and a dummy circuit which have the same composition as a memory element and the circuit of required minimum limit for the memory element and supplying the read voltage of the dummy memory element as the reference voltage for the read voltage of the memory element, a reference voltage setting part 3 setting standard voltage from outside and a comparing part 5 comparing the reference voltage and the standard voltage are provided in a same integrated circuit. Then, when the reference voltage is set, the dummy circuit is operated to write in the dummy memory element until the both voltage agree in their comparison. Thus the reference voltage can be made proper and the stable read out is realized.</p>
申请公布号 JPS63291294(A) 申请公布日期 1988.11.29
申请号 JP19870126612 申请日期 1987.05.22
申请人 NEC CORP 发明人 WATANABE TAKESHI
分类号 G11C17/00;G11C16/06 主分类号 G11C17/00
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