发明名称 CHIP ENABLE CIRCUIT
摘要 PURPOSE:To enlarge the capacity of a memory by providing a chip enable starting point delay means which delays only the starting point, which makes an output buffer to be active from a high impedance state, until near the time when effective data is outputted with the aid of a chip enable signal. CONSTITUTION:The titled circuit is provided with a chip enable starting delaying circuit 15 delaying only a trailing edge side from a H level being the starting point of a chip enable signal, the inverse of CE signal inputted by flip-flop by NOR gates 154 and 155 to a low level and a delay circuit consisting of inverters 151-153 and capacitors 156 and 157. Therefore, by the signal such as the inverse of CE signal, the output buffer can be kept in the high impedance state until the effective data is outputted. Thus the capacity of the memory can be enlarged by connecting plural IC memories. Specially, when the circuit 15 is used for an IC memory card, the card can be easily designed without considering the overlap of output when it is viewed from the outside.
申请公布号 JPS63291290(A) 申请公布日期 1988.11.29
申请号 JP19870126615 申请日期 1987.05.22
申请人 NEC CORP 发明人 KAMATANI MICHITOKU
分类号 G11C11/41;G11C11/34 主分类号 G11C11/41
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