| 摘要 |
PURPOSE:To execute an exact decoding processing regarding to a control signal, as well which exceeds the correction capacity of a conventional word and cannot be corrected, by executing an error correction by a bit unit. CONSTITUTION:An information signal 9 outputted from a deciding circuit is led to a unit delaying device 31, and delayed by a one word period. A one word delay signal 32 is connected in serial by a parallel serial converting circuit 33 and converted to a one bit data. This one bit information signal 34 is led to a selector 10. The selector 10 selects an information signal 34 outputted from the converting circuit 33 or an information signal 12 outputted from a memory circuit 11, in accordance with a switching control signal 54 outputted from an OR gate 53. In such a way, regarding to a control signal, as well which exceeds the correction capacity of a conventional word and cannot be corrected, an exact decoding processing can be executed. |
