| 摘要 |
PURPOSE:To constitute a PLL circuit capable of being operated at a high frequency inexpensively by stabilizing the frequency of an input signal after the frequency of the input signal is converted into a frequency being the difference between the frequency of a signal subject to n-multiple of the frequency of an output of a voltage controlled oscillator and the said input signal frequency. CONSTITUTION:An input signal fi and a signal nfv being the result of n-multiple of an output fv of the voltage controlled oscillator 6 by an n-multiplier 10 are given to a 1st mixer 4 and a 1st band pass filter 7 passes a signal having a frequency of fi-nfv only. An output voltage of a phase comparator 2 controls the voltage controlled oscillator 6 via a loop filter 3 and the relation of fv=fi/(n+1) is established in the synchronizing state. An output fv of the voltage controlled oscillator 6 and an output nfv of the n-multiplier 10 are given to the 2nd mixer 5, a 2nd band pass filter 8 passes only a signal having a frequency of (n+1)fv=fi and the result is outputted to an output terminal 9. Since the frequency of the phase comparator 2 and the voltage controlled oscillator 6 is reduced as fi/(n+1), the inexpensive phase comparator and voltage controlled oscillator are employed. |
