| 摘要 |
PURPOSE:To reduce the area of a memory cell, by providing two capacitors up and down in parallel in the insides of grooves, which are formed in the surface of a semiconductor substrate, and introducing impurities from the same layer as a poly Si layer, which is to become a memory device furthermore. CONSTITUTION:Grooves 11a and 11b are formed in an Si substrate 1. Then a first memory capacitor is formed with p<+> regions 21a and 21b and poly Si electrodes 22a and 22b so as to hold capacitor insulating films 4a and 4b, which are formed on the bottom surfaces and the side surfaces of the grooves 11a and 11b. A second memory capacitor is formed with the electrodes 22a and 22b and a poly Si electrode 5 so as to hold capacitor insulating films 24a and 24b, which are formed on the surfaces of the electrodes 22a and 22b. Poly Si layers 100a and 100b are formed at the same time when the electrodes 22a and 22b are formed. Impurities are implanted into the layers 100a and 100b. Thereafter, the source and the drain of a writing transistor are formed by the diffusion of the impurities from the layers 100a and 100b. Thus the two capacitors are provided in parallel. Contact holes for connecting the electrodes 22a and 22b to the substrate 1 are not required. Therefore, the occupying area of the memory cells can be reduced remarkably. |
