| 发明名称 |
MOS-type memory circuit |
| 摘要 |
A MOS-type memory circuit comprising a terminal end potential feeder circuit which applies a voltage of certain level between a supply voltage and a ground potential to terminal ends of word lines when memory addresses change-over.
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| 申请公布号 |
US4787068(A) |
申请公布日期 |
1988.11.22 |
| 申请号 |
US19870032551 |
申请日期 |
1987.04.01 |
| 申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
KIHARA, YUJI |
| 分类号 |
G11C11/41;G11C8/08;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/41 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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