| 摘要 |
PURPOSE:To utilize the same structure to easily isolate elements by an arrangement in which first regions for the bases and emitters of bipolar transistors, second regions leading to the collectors, and third regions for MISFETs are all exposed to the top surface of a substrate. CONSTITUTION:Each of an N<-> collector region 3, a P<+> type semiconductor region 5, a P<-> type intrinsic base region 6 and an N<+> type emitter region 7 is formed to the upper section of a buried layer NBL, the inside of the same peojecting region on a substrate 1, and an N<+> type collector leading-out region 4 is shaped in a projecting region different from said region. These two projecting regions are isolated by a field insulating film 2. Likewise, P<-> well regions 27, to which N channel MISFETMN1-MN4 are shaped, and an N<-> well region 31 constituting a P channel MISFET protrude onto the buried layer NBL. Accordingly, element isolation among the MISFETs is conducted by the field insulating film 2 and a P-N junction between the N<+> buried layer NBL and a P<+> buried layer PBL in the same manner as element isolation among bipolar transistors.
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