发明名称 FREQUENCY DISCRIMINATING CIRCUIT
摘要 PURPOSE:To detect a fine shift in frequency without increasing the frequency of a clock signal sufficiently for increasing the number of stages of necessary counters by detecting whether or not pulses of a reference pulse signal and a pulse signal to be detected are generated alternately. CONSTITUTION:When two pulse signals shift in frequency, the rising or falling edge of a signal of which frequency is generated twice in one cycle of a signal of low frequency. Then when the frequency of the reference pulse signal (b) is denoted as Fr and the frequency of the pulse signal (c) to be detected is denoted as Fa, the difference in the number of pulses per second is equal to the difference DELTAFa in frequency, which is Fr-Fa and equal to a frequency at which a nonalternation state is entered. the cycle generated the nonalternation state DELTATa is 1/DELTAFa. For the purpose, the nonalternation state between the reference pulse signal (b) and pulse signal (c) to be detected is detected and the shift of the pulse signal (c) to be detected from the reference frequency Fr is discriminated by using the frequency or cycle.
申请公布号 JPS63281062(A) 申请公布日期 1988.11.17
申请号 JP19870114557 申请日期 1987.05.13
申请人 HITACHI LTD 发明人 SUZUKI MOTOYUKI;MIURA YOSHIO;FUKUSHIMA AKIO;MORI YONEMITSU
分类号 G01R23/02;G11B19/28 主分类号 G01R23/02
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