发明名称 EQUALIZING CIRCUIT FOR DIGITAL DATA TRANSMISSION LINE
摘要 PURPOSE:To prevent a bit error due to malfunction of a peak detection type f<1/2> AGC circuit while equalizing a transmission line automatically by setting the state of the peak detection type f<1/2> AGC circuit equalizing the transmission line at no data transmission and keeping the state set at the no data transmission in the case of the data transmission. CONSTITUTION:The transmission line 4 is equalized by the peak value detection f<1/2> AGC circuit 1 and a data is sent to a digital circuit 3 in which data transmission and various data controls are applied. Since it is considered at first that the digital transmission is in the no data transmission state, a control circuit 2 receives information from the digital circuit 3 to control the peak value detection f<1/2> AGC circuit 1, thereby applying equalization suitable for the transmission line 4. That is, the transmission line 4 is equalized automatically without using a test device nor manual intervention. Then in detecting the digital circuit 3 to be in the data transmission state, the control circuit 2 receives the information to control the peak value detection f<1/2> AGC circuit 1, thereby keeping the state at no data transmission during the data transmission.
申请公布号 JPS63274225(A) 申请公布日期 1988.11.11
申请号 JP19870108616 申请日期 1987.05.01
申请人 NEC CORP 发明人 NAKAMURA YUZO
分类号 H04L25/03;H04B3/04 主分类号 H04L25/03
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