发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To decrease a charging/discharging quantity setting the charge quantity of a bus in charging and discharging equal, by providing an inverter to invert a signal on the bus at a position where the capacity of an address bus is divided. CONSTITUTION:When an address signal Ai with a high level is supplied to an address buffer 31, the buses 41ai and 41bi in the address bus 41i are charged with the high level, and are inverted at the inverter 42, and the buses 41ci and 41di go to low levels. Furthermore, the low levels are inverted by the inverter 43, and the bus 41ei goes to the high level, and a circuit system 44 decodes the low level on the bus 41ci and the high level on the bus 41ei, and selects a cell in a memory cell array 45. At this time, since the cell is selected by a decoder for a data line not shown in figure, the readout or the write of data is performed on the cell. Also, when the address signal supplied to the buffer 31 is the one with the low level, a reverse operation is performed, therefore, the same operation is applied only on a selected cell after all.</p>
申请公布号 JPS63273297(A) 申请公布日期 1988.11.10
申请号 JP19870107175 申请日期 1987.04.30
申请人 OKI ELECTRIC IND CO LTD 发明人 MIYAWAKI MASABUMI;MIYAMOTO SANPEI;UEHARA HIDEAKI
分类号 G11C11/409;G11C11/34;G11C11/41;G11C11/413;G11C17/00 主分类号 G11C11/409
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