发明名称 LOOP CONTROL CIRCUIT
摘要 PURPOSE:To improve the loop control speed by performing the parallel transfer of plural loop control data when these data are saved into a stack and reset. CONSTITUTION:When the loop control data are saved, these control data including the loop head addresses stored in a holding means 1 and the loop frequencies stored in a counting means 2 are connected in parallel with each othervia a data connecting/dividing means 3 and stored in a saving memory means 4 in the form of a single piece of data. When those loop control data are reset, these data are read out of the means 4 n parallel and divided into the head addresses and loop frequencies by the means 3 to be returned to both means 1 and 2. Thus it is possible to transfer plural loop control data in a single transfer cycle and therefore to improve the loop control speed with a multiple loop in particular.
申请公布号 JPS63268032(A) 申请公布日期 1988.11.04
申请号 JP19870102626 申请日期 1987.04.24
申请人 HITACHI LTD 发明人 FUJIGAMI YOSHIHIRO;ENOMOTO HIROMICHI;TSUJIOKA SHIGEO;KUBOTA KAZUMI
分类号 G06F9/26;G06F9/22;G06F9/32 主分类号 G06F9/26
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