发明名称 COMBINED SECONDARY CIRCUIT REGULATOR
摘要 <p>In a circuit for converting an unregulated input voltage (UE) to a regulated output d.c. voltage (UA), the input voltage (UE) may have a higher or lower value than the target output voltage (UA) . In addition to a target/actual value comparator (SIV), a current balancing network (SNB) is provided which simulates the current (JL) in the choke coil (L2) as a capacitor voltage during charging of the choke coil (L2), as well as a common driving circuit (TRS) designed as an incorporated constant current source for both semiconductor switches (V1, V2), an input voltage monitor (ESÜ) which switches off the circuit regulator if the input voltage (EU) is too low, and an output monitoring circuit (ASÜ) which reduces the target value of the regulating circuit if an optional threshold value is not attained.</p>
申请公布号 WO1988008638(A1) 申请公布日期 1988.11.03
申请号 DE1988000156 申请日期 1988.03.15
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址