发明名称 Peripheral mass memory unit for data processor - uses rapid access semiconductor elements via memory gas and I=O interface
摘要 <p>The external input/output data signals (16) are connected to the memory unit via an internal microprocessor (15). The processor and volatile memory modules (18) are fed with d.c. rails (20) by a mains power supply (19) and back-up power sources (21). The address and data read and write signals are fed from the processor (15) via a memory bus (17). The processor consists of an input/output interface, control circuit fed by an internal bus, CPU, clock, scrath-pad RAM, program ROM, address decoder and buffer circuit. The memory modules consist of a memory address decoder, memory buffer and a memory element.</p>
申请公布号 NL8700817(A) 申请公布日期 1988.11.01
申请号 NL19870000817 申请日期 1987.04.07
申请人 ROGER ROY ROGER DE CAMPAGNOLLE TE BROEKHUIZENVORST. 发明人
分类号 G11C5/00;(IPC1-7):G11C11/34 主分类号 G11C5/00
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