Level conversion circuit

摘要

Level conversion circuit for converting CMOS logic level signals to ECL logic level signals. The level conversion circuit includes: a level shift circuit which receives as input a CMOS logic level signal and a CMOS logic level signal of opposite logic level to the first-mentioned CMOS logic level signal, and which supplies a base potential that effects operation of a bipolar transistor in the unsaturated region and a base potential at which the bipolar transistor becomes non-conducting; a differential amplifier circuit inserted between a high-potential voltage source and a low-potential voltage source and that selects the path of current flowing from the high-potential voltage source to the low-potential voltage source by controlling bipolar transistors whose emitter terminals are mutually connected and whose conduction is controlled by said base potentials; and a bipolar transistor that is conduction controlled by one of the collector potentials of said bipolar transistors and that outputs an ECL logic level signal from its emitter terminal.