| 摘要 |
PURPOSE:To absorb the variance in threshold value at the manufacture of a FET by connecting the source of 1st and 2nd FETs in common to a current source circuit using a 3rd FET so as to form an amplifier circuit, connecting plural stages of the amplifiers in cascade to constitute a negative feedback loop thereby controlling the gate-source voltage of the 3rd FET. CONSTITUTION:Resistive load type source coupling logic circuits I1-In+1 are connected in cascade to form a ring oscillator of the negative feedback circuit constitution, the oscillator is connected to the source coupling logic circuit 54 incorporated with FETs 58, 59 having drain resistors 55, 56 to form a voltage controlled oscillator. The ring oscillator is constituted by two Schottky diodes 3, 4 and 5, 6 connected in series, MESFETs 7, 8 connected to them and the 3rd FET 9 for current source connected to the two parallel circuits. Through the constitution above, power terminals 101, 102 are provided to both ends of the circuit and a bias input terminal 43 is provided to the gate of the FET 9.
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