发明名称 |
SEMICONDUCTOR INPUT PROTECTIVE DEVICE |
摘要 |
PURPOSE:To achieve the input protection of a substrate bias generating circuit without deteriorating the characteristics of the substrate bias generating circuit by connecting the input gate of a transistor to the output terminal of the substrate bias generating circuit. CONSTITUTION:The gate and source of an input protective transistor 20 are connected to the output terminal 7 of a substrate bias generating circuit and the drain of the transistor 20 is connected to a reference potential 6. When a potential much lower than a substrate bias potential is applied to the external terminal 7 of the substrate bias generating circuit, a current is applied by the breakdown characteristics mainly of an input protective transistor 21 or of the other input protective transistor 20 to protect the substrate bias generating circuit. When a potential higher than the reference voltage 6 is applied to the external terminal 7 of the substrate bias generating circuit, a current is applied by turning mainly the input protective transistor 20 or the other input protective transistor 21 ON the suppress the potential to the reference potential 6 or the potential of an electric source 8 to protect the substrate bias generating circuit. |
申请公布号 |
JPS63244872(A) |
申请公布日期 |
1988.10.12 |
申请号 |
JP19870078713 |
申请日期 |
1987.03.31 |
申请人 |
TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP |
发明人 |
UCHIDA KAZUYUKI;SAEKI YUKIHIRO;NAKAMURA HIROAKI |
分类号 |
H01L29/78;H01L21/8234;H01L27/02;H01L27/088 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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