发明名称 MEMORY DEVICE
摘要 PURPOSE:To shorten the memory access time and to decrease the number of input/output pins of a memory controller MCU by outputting the data read out of a RAM directly onto a system bus. CONSTITUTION:A data part and an error correction code are outputted to a system bus 5 from a RAM 200 and sent back directly to a requester by the read requests given from an arithmetic processor EPU 3 and input/output controllers IOC 41 and 42. In this case, an MCU 100 checks the presence or absence of a correctable error of the data part of the data outputted onto the bus 5. If no correctable error is detected, this fact is informed to the requester and the data is processed as it is. When an error is detected, the RAM 200 is inactivated and the corrected data is outputted onto the bus 5. Thus the requester reads out the corrected data and uses it as its request data. Therefore no intervention of the MCU 100 is needed so that the memory access time is shortened and the number of pins of the MCU 100 is decreased.
申请公布号 JPS63240658(A) 申请公布日期 1988.10.06
申请号 JP19870075436 申请日期 1987.03.27
申请人 NEC CORP 发明人 TOMINAGA MASATOSHI
分类号 G06F11/10;G06F12/16 主分类号 G06F11/10
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