发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To contrive the attainment of a stable operation by connecting a common connection emitter (node) of two sets of differential transistors (TRs) being components of an emitter coupling logic (ECL) FF circuit to a prescribed potential point via a leakage resistor. CONSTITUTION:A resistor RL is provided between emitters of common connection of differential transistors T1, T2 of the ECLFF circuit, that is, nodes n1, n2. Parasitic capacitance exists between the nodes n1, n1 and ground and when TRs 3, 6 are transited alternately by a clock CK, the collector current of the TRs 1, 2 or 4, 5 in the on-state is changed. Thus, the base-emitter voltage VBE of the TRs 1, 2 or TRs 4, 5 in the on-state is changed and the parasitic capacitance, i.e., the potential of the nodes n1, n2 tends to be changed, but its change is suppressed by the presence of the RL. Thus, the charge/discharge current of the parasitic capacitance is decreased, the AC noise caused thereby is suppressed and the operation of the ECLFF circuit is stabilized.
申请公布号 JPS63240117(A) 申请公布日期 1988.10.05
申请号 JP19870071427 申请日期 1987.03.27
申请人 HITACHI LTD 发明人 HAMAMOTO MASATO;YAMADA TOSHIO;KOBAYASHI TORU
分类号 H03K3/286 主分类号 H03K3/286
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