发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To prevent a circuit element for receiving an output signal from a boosting circuit from being destructed by providing a voltage restricting means to the input or output side of a boosting circuit so that the output signal of the boosting circuit is boosted more than a power supply voltage or dropping it less than a prescribed potential. CONSTITUTION:The titled device is provided with a voltage generating circuit consisting of a boosting means for generating voltage >= power supply voltage Vcc and a voltage restricting means for dropping the voltage >= the power supply voltage Vcc less than the 1st prescribed voltage. For instance, a precharging MOSFET Q1 is provided between the output side electrode of a boosting capacitor Cp1 in the boosting circuit and the power supply voltage Vcc, voltage obtained from the output side electrode of the boosting capacitor Cp1 is supplied to the source of a MOSFET Q2 and a word line selecting timing signal phix is outputted from the drain. The output signal of the boosting circuit is >= the power supply voltage Vcc and <= the prescribed value. Consequently, the circuit element receiving the output signal of the boosting circuit can be prevented from being destructed.
申请公布号 JPS63239673(A) 申请公布日期 1988.10.05
申请号 JP19870071509 申请日期 1987.03.27
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 ISHII KYOKO;YANAGISAWA KAZUMASA;MURANAKA MASAYA
分类号 G11C11/407;G11C11/34 主分类号 G11C11/407
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