发明名称 BIMOS LOGIC CIRCUIT
摘要 PURPOSE:To obtain an ideal output level with less number of elements by connecting the midpoint between a PMOS transistor TR and an NMOSTR to a base of a bipolar TR and connecting an NMOSTR between an output terminal and a power supply. CONSTITUTION:With an input voltage VIN given at an L level, a PMOSTR 101 is turned on. When the control signal phi is at an H level in this case, a bipolar TR 103 is turned on and an output voltage VOUT fed to an output terminal O goes to an H level. NMOS TRs 102, 104 and 105 are turned off in this case and a midpoint N and the terminal O are floated from the ground. On the other hand, when the signal phi goes to an L level, since the NMOS TR receiving the control signal, inverse of phi is turned on, the voltage VOUT goes to 0. Thus, in case of the voltage VIN given at an L level, the VOUT is controlled by the signal phi. When the voltage VIN is at an H level conversely, the NMOS TR 102 is turned on and the TR 103 is turned off. Since the NMOS TR is turned on, the voltage VOUT goes to 0. Thus, number of elements is reduced and an output having nearly equal value to the power voltage is obtained.
申请公布号 JPS63240126(A) 申请公布日期 1988.10.05
申请号 JP19870073462 申请日期 1987.03.27
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 MASUDA MASAMI;KAWAGUCHI TAKAYUKI;NOZAWA YASUMITSU
分类号 H01L21/8249;H01L21/8222;H01L21/8248;H01L27/06;H03K17/56;H03K19/08;H03K19/0944;H03K19/096 主分类号 H01L21/8249
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