| 摘要 |
The phase demodulator comprises a first phase detector (11) for phase-dectecting an input digital-signal-modulated carrier wave with a reference carrier wave fed thereto, a variable phase shifter (17) for controlling the phase of the reference carrier wave in response to a control signal, and a second phase detector (12) for phase-detecting the input digital-signal-modulated carrier wave in response to an output of the variable phase shifter (17). Further there are provided means for recovering the reference carrier wave, multi-level discriminators (13, 14) for multi-level-discriminating the outputs of the first and second phase detectors (11 and 12, respectively), and a logic circuit (15) for logically processing the output of the discriminators (13, 14) and providing an orthogonality error signal as the control signal. This phase demodulator is capable of insuring orthogonality at all times and thereby eliminates deterioration in bit error rate due to changes in the circuit constant of the phase shifter. |
