发明名称 TROUBLE RECOVERING PROCESSING SYSTEM
摘要 PURPOSE:To decrease the number of program steps for trouble recovering processing by executing the trouble recovery of a memory group generated an intermittent trouble with a reading instruction and a same writing instruction at the time of the usual action to the memory group. CONSTITUTION:A trouble exists at the key data of a KS1 to a certain KS access address, the trouble does not exist at the key data of a KS2 to the address and the key data trouble of the KS1 is made an intermittent trouble. In the situation, when the reading of KS1-2 to the address is executed, the address is set to a trouble address register 11. Here, the key data recovering processing of the KS1 to the address is executed by reading normal key data, first, with an ISK instruction to the address shown by the trouble address register 11 and writing the read key data to KS1-2 with an SSK instruction. Thus, the number of microprogram steps for the intermittent trouble recovering processing of a memory is minimized.
申请公布号 JPS63231551(A) 申请公布日期 1988.09.27
申请号 JP19870063948 申请日期 1987.03.20
申请人 HITACHI LTD;HITACHI COMPUT ENG CORP LTD 发明人 ONUMA AKIRA;KISHI MAKOTO;TANIGUCHI TOSHIHISA;KUMAGAI TAKASHI
分类号 G06F12/16;G06F11/00 主分类号 G06F12/16
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