发明名称 FAST FLOATING POINT ARITHMETIC SYSTEM
摘要 PURPOSE:To successively execute arithmetic processing by successively applying succeeding commands from a host processor to a fast floating point computing element (FFP) during the execution of arithmetic processing in the FFP. CONSTITUTION:Plural command blocks are stored from the host processor 200 in areas specified by the host processor 200 in a data storage part 3 of the FFP 100. Respective command blocks include information A1, A2, A3... specifying the areas of the data storage part 3 storing the command blocks to be successively executed and the FFP 100 starts the arithmetic processing of the succeeding command block immediately after ending the arithmetic processing of one command block.
申请公布号 JPS63226764(A) 申请公布日期 1988.09.21
申请号 JP19870060169 申请日期 1987.03.17
申请人 FANUC LTD 发明人 YONEKURA MIKIO
分类号 G06F7/00;G06F9/38;G06F15/16 主分类号 G06F7/00
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